Line data Source code
1 : /*
2 : * Copyright (c) 2018, Alliance for Open Media. All rights reserved
3 : *
4 : * This source code is subject to the terms of the BSD 2 Clause License and
5 : * the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License
6 : * was not distributed with this source code in the LICENSE file, you can
7 : * obtain it at www.aomedia.org/license/software. If the Alliance for Open
8 : * Media Patent License 1.0 was not distributed with this source code in the
9 : * PATENTS file, you can obtain it at www.aomedia.org/license/patent.
10 : */
11 : #include "synonyms.h"
12 : #include <assert.h>
13 : #include <immintrin.h>
14 : #include "aom_dsp_rtcd.h"
15 : // #include "aom_config.h"
16 :
17 : // #include "aom_ports/mem.h"
18 : // #include "aom/aom_integer.h"
19 :
20 : // #include "aom_dsp/aom_dsp_common.h"
21 : // #include "aom_dsp/aom_filter.h"
22 : // #include "aom_dsp/x86/obmc_intrinsic_sse4.h"
23 :
24 : ////////////////////////////////////////////////////////////////////////////////
25 : // 8 bit
26 : ////////////////////////////////////////////////////////////////////////////////
27 0 : static INLINE int32_t xx_hsum_epi32_si32(__m128i v_d) {
28 0 : v_d = _mm_hadd_epi32(v_d, v_d);
29 0 : v_d = _mm_hadd_epi32(v_d, v_d);
30 0 : return _mm_cvtsi128_si32(v_d);
31 : }
32 :
33 0 : static INLINE void obmc_variance_w4(const uint8_t *pre, const int pre_stride,
34 : const int32_t *wsrc, const int32_t *mask,
35 : unsigned int *const sse, int *const sum,
36 : const int h) {
37 0 : const int pre_step = pre_stride - 4;
38 0 : int n = 0;
39 0 : __m128i v_sum_d = _mm_setzero_si128();
40 0 : __m128i v_sse_d = _mm_setzero_si128();
41 :
42 0 : assert(IS_POWER_OF_TWO(h));
43 :
44 : do {
45 0 : const __m128i v_p_b = _mm_cvtsi32_si128(*(const uint32_t *)(pre + n));
46 0 : const __m128i v_m_d = _mm_load_si128((const __m128i *)(mask + n));
47 0 : const __m128i v_w_d = _mm_load_si128((const __m128i *)(wsrc + n));
48 :
49 0 : const __m128i v_p_d = _mm_cvtepu8_epi32(v_p_b);
50 :
51 : // Values in both pre and mask fit in 15 bits, and are packed at 32 bit
52 : // boundaries. We use pmaddwd, as it has lower latency on Haswell
53 : // than pmulld but produces the same result with these inputs.
54 0 : const __m128i v_pm_d = _mm_madd_epi16(v_p_d, v_m_d);
55 :
56 0 : const __m128i v_diff_d = _mm_sub_epi32(v_w_d, v_pm_d);
57 0 : const __m128i v_rdiff_d = xx_roundn_epi32(v_diff_d, 12);
58 0 : const __m128i v_sqrdiff_d = _mm_mullo_epi32(v_rdiff_d, v_rdiff_d);
59 :
60 0 : v_sum_d = _mm_add_epi32(v_sum_d, v_rdiff_d);
61 0 : v_sse_d = _mm_add_epi32(v_sse_d, v_sqrdiff_d);
62 :
63 0 : n += 4;
64 :
65 0 : if (n % 4 == 0) pre += pre_step;
66 0 : } while (n < 4 * h);
67 :
68 0 : *sum = xx_hsum_epi32_si32(v_sum_d);
69 0 : *sse = xx_hsum_epi32_si32(v_sse_d);
70 0 : }
71 :
72 16610200 : static INLINE void obmc_variance_w8n(const uint8_t *pre, const int pre_stride,
73 : const int32_t *wsrc, const int32_t *mask,
74 : unsigned int *const sse, int *const sum,
75 : const int w, const int h) {
76 16610200 : int n = 0, width, height = h;
77 16610200 : __m128i v_sum_d = _mm_setzero_si128();
78 16610200 : __m128i v_sse_d = _mm_setzero_si128();
79 16610200 : const __m256i v_bias_d = _mm256_set1_epi32((1 << 12) >> 1);
80 : __m128i v_d;
81 : const uint8_t *pre_temp;
82 16610200 : assert(w >= 8);
83 16610200 : assert(IS_POWER_OF_TWO(w));
84 16610200 : assert(IS_POWER_OF_TWO(h));
85 : do {
86 242748000 : width = w;
87 242748000 : pre_temp = pre;
88 : do {
89 242779000 : const __m128i v_p_b = _mm_loadl_epi64((const __m128i *)pre_temp);
90 242779000 : const __m256i v_m_d = _mm256_loadu_si256((__m256i const *)(mask + n));
91 485559000 : const __m256i v_w_d = _mm256_loadu_si256((__m256i const *)(wsrc + n));
92 242779000 : const __m256i v_p0_d = _mm256_cvtepu8_epi32(v_p_b);
93 :
94 : // Values in both pre and mask fit in 15 bits, and are packed at 32 bit
95 : // boundaries. We use pmaddwd, as it has lower latency on Haswell
96 : // than pmulld but produces the same result with these inputs.
97 242779000 : const __m256i v_pm_d = _mm256_madd_epi16(v_p0_d, v_m_d);
98 242779000 : const __m256i v_diff0_d = _mm256_sub_epi32(v_w_d, v_pm_d);
99 :
100 242779000 : const __m256i v_sign_d = _mm256_srai_epi32(v_diff0_d, 31);
101 : const __m256i v_tmp_d =
102 485559000 : _mm256_add_epi32(_mm256_add_epi32(v_diff0_d, v_bias_d), v_sign_d);
103 242779000 : const __m256i v_rdiff0_d = _mm256_srai_epi32(v_tmp_d, 12);
104 242779000 : const __m128i v_rdiff_d = _mm256_castsi256_si128(v_rdiff0_d);
105 242779000 : const __m128i v_rdiff1_d = _mm256_extracti128_si256(v_rdiff0_d, 1);
106 :
107 242779000 : const __m128i v_rdiff01_w = _mm_packs_epi32(v_rdiff_d, v_rdiff1_d);
108 242779000 : const __m128i v_sqrdiff_d = _mm_madd_epi16(v_rdiff01_w, v_rdiff01_w);
109 :
110 242779000 : v_sum_d = _mm_add_epi32(v_sum_d, v_rdiff_d);
111 242779000 : v_sum_d = _mm_add_epi32(v_sum_d, v_rdiff1_d);
112 242779000 : v_sse_d = _mm_add_epi32(v_sse_d, v_sqrdiff_d);
113 :
114 242779000 : pre_temp += 8;
115 242779000 : n += 8;
116 242779000 : width -= 8;
117 242779000 : } while (width > 0);
118 242748000 : pre += pre_stride;
119 242748000 : height -= 1;
120 242748000 : } while (height > 0);
121 16610200 : v_d = _mm_hadd_epi32(v_sum_d, v_sse_d);
122 16610200 : v_d = _mm_hadd_epi32(v_d, v_d);
123 16610200 : *sum = _mm_cvtsi128_si32(v_d);
124 16610200 : *sse = _mm_cvtsi128_si32(_mm_srli_si128(v_d, 4));
125 16610200 : }
126 :
127 21758000 : static INLINE void obmc_variance_w16n(const uint8_t *pre, const int pre_stride,
128 : const int32_t *wsrc, const int32_t *mask,
129 : unsigned int *const sse, int *const sum,
130 : const int w, const int h) {
131 21758000 : int n = 0, width, height = h;
132 : __m256i v_d;
133 : __m128i res0;
134 : const uint8_t *pre_temp;
135 21758000 : const __m256i v_bias_d = _mm256_set1_epi32((1 << 12) >> 1);
136 21758000 : __m256i v_sum_d = _mm256_setzero_si256();
137 21758000 : __m256i v_sse_d = _mm256_setzero_si256();
138 :
139 21758000 : assert(w >= 16);
140 21758000 : assert(IS_POWER_OF_TWO(w));
141 21758000 : assert(IS_POWER_OF_TWO(h));
142 : do {
143 477458000 : width = w;
144 477458000 : pre_temp = pre;
145 : do {
146 857117000 : const __m128i v_p_b = _mm_loadu_si128((__m128i *)pre_temp);
147 857117000 : const __m256i v_m0_d = _mm256_loadu_si256((__m256i const *)(mask + n));
148 857117000 : const __m256i v_w0_d = _mm256_loadu_si256((__m256i const *)(wsrc + n));
149 : const __m256i v_m1_d =
150 857117000 : _mm256_loadu_si256((__m256i const *)(mask + n + 8));
151 : const __m256i v_w1_d =
152 1714230000 : _mm256_loadu_si256((__m256i const *)(wsrc + n + 8));
153 :
154 857117000 : const __m256i v_p0_d = _mm256_cvtepu8_epi32(v_p_b);
155 1714230000 : const __m256i v_p1_d = _mm256_cvtepu8_epi32(_mm_srli_si128(v_p_b, 8));
156 :
157 857117000 : const __m256i v_pm0_d = _mm256_madd_epi16(v_p0_d, v_m0_d);
158 857117000 : const __m256i v_pm1_d = _mm256_madd_epi16(v_p1_d, v_m1_d);
159 :
160 857117000 : const __m256i v_diff0_d = _mm256_sub_epi32(v_w0_d, v_pm0_d);
161 857117000 : const __m256i v_diff1_d = _mm256_sub_epi32(v_w1_d, v_pm1_d);
162 :
163 857117000 : const __m256i v_sign0_d = _mm256_srai_epi32(v_diff0_d, 31);
164 857117000 : const __m256i v_sign1_d = _mm256_srai_epi32(v_diff1_d, 31);
165 :
166 : const __m256i v_tmp0_d =
167 1714230000 : _mm256_add_epi32(_mm256_add_epi32(v_diff0_d, v_bias_d), v_sign0_d);
168 : const __m256i v_tmp1_d =
169 1714230000 : _mm256_add_epi32(_mm256_add_epi32(v_diff1_d, v_bias_d), v_sign1_d);
170 :
171 857117000 : const __m256i v_rdiff0_d = _mm256_srai_epi32(v_tmp0_d, 12);
172 857117000 : const __m256i v_rdiff2_d = _mm256_srai_epi32(v_tmp1_d, 12);
173 :
174 857117000 : const __m256i v_rdiff1_d = _mm256_add_epi32(v_rdiff0_d, v_rdiff2_d);
175 857117000 : const __m256i v_rdiff01_w = _mm256_packs_epi32(v_rdiff0_d, v_rdiff2_d);
176 857117000 : const __m256i v_sqrdiff_d = _mm256_madd_epi16(v_rdiff01_w, v_rdiff01_w);
177 :
178 857117000 : v_sum_d = _mm256_add_epi32(v_sum_d, v_rdiff1_d);
179 857117000 : v_sse_d = _mm256_add_epi32(v_sse_d, v_sqrdiff_d);
180 :
181 857117000 : pre_temp += 16;
182 857117000 : n += 16;
183 857117000 : width -= 16;
184 857117000 : } while (width > 0);
185 477458000 : pre += pre_stride;
186 477458000 : height -= 1;
187 477458000 : } while (height > 0);
188 :
189 21758000 : v_d = _mm256_hadd_epi32(v_sum_d, v_sse_d);
190 21758000 : v_d = _mm256_hadd_epi32(v_d, v_d);
191 21758000 : res0 = _mm256_castsi256_si128(v_d);
192 43515900 : res0 = _mm_add_epi32(res0, _mm256_extractf128_si256(v_d, 1));
193 21758000 : *sum = _mm_cvtsi128_si32(res0);
194 21758000 : *sse = _mm_cvtsi128_si32(_mm_srli_si128(res0, 4));
195 21758000 : }
196 :
197 : #define OBMCVARWXH(W, H) \
198 : unsigned int aom_obmc_variance##W##x##H##_avx2( \
199 : const uint8_t *pre, int pre_stride, const int32_t *wsrc, \
200 : const int32_t *mask, unsigned int *sse) { \
201 : int sum; \
202 : if (W == 4) { \
203 : obmc_variance_w4(pre, pre_stride, wsrc, mask, sse, &sum, H); \
204 : } else if (W == 8) { \
205 : obmc_variance_w8n(pre, pre_stride, wsrc, mask, sse, &sum, W, H); \
206 : } else { \
207 : obmc_variance_w16n(pre, pre_stride, wsrc, mask, sse, &sum, W, H); \
208 : } \
209 : \
210 : return *sse - (unsigned int)(((int64_t)sum * sum) / (W * H)); \
211 : }
212 :
213 0 : OBMCVARWXH(128, 128)
214 0 : OBMCVARWXH(128, 64)
215 0 : OBMCVARWXH(64, 128)
216 596997 : OBMCVARWXH(64, 64)
217 671971 : OBMCVARWXH(64, 32)
218 762392 : OBMCVARWXH(32, 64)
219 1864670 : OBMCVARWXH(32, 32)
220 1753620 : OBMCVARWXH(32, 16)
221 1741980 : OBMCVARWXH(16, 32)
222 4742740 : OBMCVARWXH(16, 16)
223 4530900 : OBMCVARWXH(16, 8)
224 5637570 : OBMCVARWXH(8, 16)
225 8228650 : OBMCVARWXH(8, 8)
226 0 : OBMCVARWXH(8, 4)
227 0 : OBMCVARWXH(4, 8)
228 0 : OBMCVARWXH(4, 4)
229 0 : OBMCVARWXH(4, 16)
230 0 : OBMCVARWXH(16, 4)
231 2748570 : OBMCVARWXH(8, 32)
232 2776430 : OBMCVARWXH(32, 8)
233 1227920 : OBMCVARWXH(16, 64)
234 1100280 : OBMCVARWXH(64, 16)
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